The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 24, 2001

Filed:

Oct. 26, 1998
Applicant:
Inventors:

Anita X. Meng, Milpitas, CA (US);

Ronald Choi, Scarborough, CA;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 2/90175 ;
U.S. Cl.
CPC ...
H03K 2/90175 ;
Abstract

An I/O interface circuit which is capable of tolerating the application of an overvoltage condition to a corresponding I/O pad but which also has a relatively low trip point voltage includes an overvoltage detection circuit configured to have a trip point at a first voltage provided by a voltage divider circuit. The voltage divider circuit may include a pair of transistors coupled in series between a voltage source having a second voltage and ground. In such cases, the first voltage may be approximately equal to the difference between the second voltage and a threshold voltage of one of the pair of transistors. Alternatively, the voltage divider circuit may include a NAND gate having an output coupled to the overvoltage detection circuit and an input coupled to receive a second voltage. The second voltage may be determined by a voltage at an I/O pad of the I/O interface and one or more diodes coupled between the I/O pad and the NAND gate.


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