The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 17, 2001

Filed:

Aug. 24, 1998
Applicant:
Inventors:

Cory A. Cherichetti, Cameon Park, CA (US);

Joseph D. Harwood, Milpitas, CA (US);

Assignee:

Sharewave, Inc., El Dorado Hills, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 5/21 ; H04N 5/445 ;
U.S. Cl.
CPC ...
H04N 5/21 ; H04N 5/445 ;
Abstract

Dithering logic includes a number of programmable linear feedback shift registers (LFSRs), each configured to receive one of a number of color components (e.g., red-green-blue) of a video information signal as an input and to provide one of a number of dithered color components of the video information signal as an output. The dithered color components each include a greater number of bits than the color components. The LFSRs may be configured so that each LFSR includes a mask register configured to accept a characteristic polynomial. The dithering logic may be included in a set-top controller of a computer network that is organized to include a graphics processor communicatively coupled to the set-top controller. The dithering logic is thus configured to introduce pseudorandom noise into video information signals transmitted from the graphics processor to the set-top controller in accordance with one or more characteristic polynomials. Preferably, the characteristic polynomials are primitive polynomials.


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