The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 17, 2001

Filed:

Jun. 11, 1998
Applicant:
Inventor:

Farideh Golshan, Mountain View, CA (US);

Assignee:

Sun Microsystems, Inc., Palo Alto, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 3/128 ;
U.S. Cl.
CPC ...
G01R 3/128 ;
Abstract

A system for coupling a Dynamic Termination Logic (DTL) type output driver to IEEE 1149.1 boundary-scan circuitry includes a logic circuit that converts the data and output enable signals of the IEEE 1149.1 specification to test “q_up,” “q_dn” and “q25_dn” signals meeting the requirements of the DTL driver. These test q_up, q_dn and q25_dn are selectively provided to the DTL driver during boundary-scan testing of the output driver. In a further refinement, the system also converts functional q_up, q_dn and q25_dn signals provided by the circuit under test to the data and output enable signals of the IEEE 1149.1 specification. The system allows the widely used IEEE 1149.1 boundary-scan standard to be used with DTL drivers. The resulting compatibility simplifies the testing and use of the DTL drivers, and provides a new boundary-scan standard for use with DTL drivers that is compliant with the IEEE 1149.1 standard.


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