The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 17, 2001

Filed:

Feb. 22, 1999
Applicant:
Inventors:

Derek J. Lentz, Los Gatos, CA (US);

Yasuaki Hagiwara, Santa Clara, CA (US);

Te-Li Lau, Palo Alto, CA (US);

Cheng-Long Tang, San Jose, CA (US);

Le Trong Nguyen, Monte Sereno, CA (US);

Assignee:

Seiko Epson Corporation, Tokyo-to, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/202 ;
U.S. Cl.
CPC ...
G06F 1/202 ;
Abstract

A system for transferring data in a microprocessor architecture including a memory array unit (MAU) and multiple devices seeking access to the MAU. The system has a row match circuit for detecting and indicating a row match between successive row addresses. The row match circuit include a latch for storing a previous row address request, and a comparator for comparing a previously latched row address request with a present row address request associated with a specific device of the multiple devices seeking access to the MAU. The comparator asserts a row match signal when the previously latched row address request matches the present row address request. The system further includes an arbiter for controlling priorities associated with the multiple devices seeking access to the MAU. The arbiter increases a priority of the specific device when the row match signal is asserted


Find Patent Forward Citations

Loading…