The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 17, 2001

Filed:

Mar. 31, 1998
Applicant:
Inventors:

Dennis Keats, Riverside, CA (US);

Kang Xiao, Irvine, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11B 2/710 ; G11B 2/012 ; G06F 1/314 ;
U.S. Cl.
CPC ...
G11B 2/710 ; G11B 2/012 ; G06F 1/314 ;
Abstract

An apparatus is employed for providing for efficient communication between high level and low level processing engines in a disk formatter for formatting a disk, the high-level engine outputting at least one instruction to control disk operations to the low-level engine which processes the instruction. The apparatus includes an instruction queue within the low-level engine. The instruction queue stores the instruction received by the low level processing engine from the high level processing engine, which outputs the instruction to the memory in accordance with a first clock signal generated by the high-level engine. The instruction queue outputs the instruction in accordance with a second clock signal of the low level processing engine which corresponds to a predetermined disk transfer rate. In accordance with another embodiment of the present invention, a method is also employed for providing for efficient communication between high and low level processing engines in a disk formatter for formatting a disk. The method includes the steps of storing an instruction for controlling disk operations output by the high level processing engine in an instruction queue of the low-level engine. The instruction is output by the high level processing engine in accordance with a first clock signal of the high level processing engine. In addition, the instruction is output from the instruction queue in accordance with a second clock signal of the low level processing engine which corresponds to a predetermined disk transfer rate.


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