The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 17, 2001
Filed:
Aug. 27, 1998
Adam R. Brown, Eindhoven, NL;
Wiebe B. De Boer, Eindhoven, NL;
U.S. Philips Corporation, New York, NY (US);
Abstract
Devices with Schottky junctions are manufactured in that a semiconductor body with a substrate is provided with a first, for example n-type semiconductor region in the form of an epitaxial layer. A Schottky metal is locally provided thereon. A second semiconductor region is advantageously formed directly below the Schottky metal, with the purpose of adjusting the level of the Schottky barrier. Around this, a third semiconductor region is formed in the first region at at least two sides, which third region is then of the p-conductivity type and, when it entirely surrounds the second region, forms a so-called guard ring. A disadvantage of the above known method is that the devices obtained thereby have a (forward) current-voltage characteristic which is not very well controllable and reproducible. This hampers mass manufacture. To counteract this disadvantage, a method according to the invention provides the formation of the second semiconductor region by means of low-temperature gas phase epitaxy, such that it has the first or the second conductivity type, and the third region is formed by means of ion implantation, the second semiconductor region being formed after the third region has been formed. Devices are obtained thereby whose current-voltage characteristics can be adjusted over a wide range with very good reproducibility and well controlled. The second semiconductor region may be provided over the entire surface or selectively within the third region only.