The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 03, 2001
Filed:
Jul. 28, 1997
Applicant:
Inventors:
Richard Conlin, Franklin, MA (US);
Tim Wright, Framingham, MA (US);
Peter Marconi, Franklin, MA (US);
Mukesh Chatter, Hopkinton, MA (US);
Assignee:
NeoNet LLLC, Marlboro, MA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/200 ;
U.S. Cl.
CPC ...
G06F 1/200 ;
Abstract
Apparatus for and method of enhancing the performance of multi-port internal cached DRAMs and the like by providing for communicating to system I/O resources messages sent by other such resources and the message location within the DRAM array, and further providing for efficient internal data bus usage in accommodating for both small and large units of data transfer.
Conlin, Richard. (2001). Apparatus for and method of architecturally enhancing the performance of a multi-port internally cached (ampic) dram array and like (U.S. Patent No. 6212597). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6212597
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile