The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 03, 2001

Filed:

May. 19, 1999
Applicant:
Inventors:

Woogeun Rhee, Irvine, CA (US);

Akbar Ali, Garden Grove, CA (US);

Matteo Conta, Irvine, CA (US);

Assignee:

Conexant Systems, Inc., Newport Beach, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 1/02 ; H03L 7/08 ;
U.S. Cl.
CPC ...
H03L 1/02 ; H03L 7/08 ;
Abstract

A phase-locked loop includes a phase/frequency detector, a charge pump, a loop filter, an oscillator and a feedback circuit coupled between the oscillator and the phase/frequency detector. The loop filter includes a first temperature-variable well resistor and has a gain directly related to resistance of the first resistor. An oscillator coupled to the loop filter includes a voltage-to-current converter that generates a reference current based on the loop filter voltage, and a current-controlled oscillator that generates the output clock based on the value of the reference current. The voltage-to-current converter includes a first transistor that receives the loop filter voltage at a gate and a second temperature-variable well resistor coupled to the source of the first transistor. The oscillator gain is indirectly related to the resistance of the second resistor. The second well resistor and first well resistor have substantially equal resistances and substantially equal temperature coefficients. Since the loop bandwidth includes the product of the loop filter gain and oscillator gain, the effect of temperature-induced resistance variations on loop bandwidth is minimized.


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