The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 03, 2001
Filed:
Apr. 29, 1999
Applicant:
Inventor:
Kamal Dalmia, Austin, TX (US);
Assignee:
Cypress Semiconductor Corp., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/087 ;
U.S. Cl.
CPC ...
H03L 7/087 ;
Abstract
An apparatus comprising a first circuit and a clock circuit. The first circuit may be configured to generate an output signal and a re-timed data signal in response to (i) a data input signal, (ii) a first clock signal and (iii) a second clock signal. The clock circuit may be configured to generate the first and second clock signals in response to the output signal.
Dalmia, Kamal. (2001). Clock and data recovery pll based on parallel architecture (U.S. Patent No. 6211741). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6211741
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile