High performance cml to cmos converter

Abstract

The present invention is a CML to CMOS converter which includes a bipolar input stage, a current source/current sink stage, and an output stage. The converter is able to transfer a CML input voltage differential to a CMOS compatible voltage having constant high and low voltage levels with a constant duty cycle. The bipolar input stage receives an incoming CML voltage differential and steps the voltage levels down. Utilizing the stepped down CML voltage differential, the current/source sink drives the output stage by maintaining an equal current source and current sink to and from the output stage, ensuring that an output voltage at the output stage rises and falls to constant high and low voltage levels, thereby maintaining a constant duty cycle. A first pair of NMOS transistors, coupled to the output stage drive current to the output stage from a high input voltage rail whenever the input differential is high. A first pair of PMOS transistors, coupled to the output stage sink current from the output stage to a low input voltage rail whenever the input voltage is low. The transistors are arranged and biased in order to ensure that the current sink transistors are not on as current is sourced to the output stage from the high input voltage, and the current source transistors are not on as current is sunk from the output stage to the low input voltage.