The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 03, 2001
Filed:
Aug. 06, 1998
Helmut Klose, München, DE;
Emmerich Bertagnolli, München, DE;
Infineon - Technologies AG, Munich, DE;
Abstract
A read-only memory cell device includes a substrate formed of semiconductor material and having a main area. Memory cells in the vicinity of the main area are disposed in matrix form in columns and rows in a cell field. Each memory cell has in each case at least one MOS transistor with a source region, a drain region, a channel region, a gate dielectric and a gate electrode. The MOS transistors of a column are connected in series one after the other. Each column is connected to a bit line and the gate electrodes of the MOS transistors of a row are connected to a word line. The source and drain regions of the MOS transistors of a column are formed in source/drain webs running substantially parallel to one another at a predetermined spacing, are electrically insulated from one another, are produced from the semiconductor material of the substrate and have a predetermined web depth, starting from the main area of the substrate. The word lines for connection of the gate electrodes of the MOS transistors run transversely with respect to the longitudinal direction of the source/drain webs.