The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 27, 2001
Filed:
Mar. 04, 1999
Luigi Ternullo, Jr., San Jose, CA (US);
Michael C. Stephens, Jr., San Jose, CA (US);
Vanguard International Semiconductor Corp., Hsinchu, TW;
Abstract
A charge pump limits the voltages at nodes internal to the charge pump to reduce the risk of junction breakdown in the charge pump. The charge pump includes a first pump circuit, a second pump circuit, a first clamp and a second clamp. The first clamp limits the voltage level of a well by providing a current path from the well to the output lead when the voltage level of the well reaches a first predetermined limit. The voltage level at a node from which charge is redistributed to the well is limited by the second clamp, which is configured to provide a conductive path from the node to the output lead when the voltage level of the node reaches a second predetermined limit. The pump circuits can each include a logic circuit that is configured, depending on the level of an external supply voltage, to reduce the rate at which the capacitor node is boosted when the external supply voltage is relatively high. The logic circuit can also vary the voltage difference between the capacitor node and the external supply voltage to decrease the relative voltage level at the capacitor node relative to the level of the external supply voltage. These features also help reduce the risk of junction breakdown in the charge pump.