The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 27, 2001
Filed:
Jun. 05, 2000
Ikuo Fuchigami, Fukuoka, JP;
Tomonori Kataoka, Fukuoka, JP;
Youichi Nishida, Fukuoka, JP;
Tomoo Kimura, Fukuoka, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
A semiconductor integrated circuit includes a booster for boosting a power supply voltage, and outputting the boosted voltage; an output circuit being supplied with the boosted voltage, and generating an output voltage from the boosted voltage; a reference voltage generator being supplied with the power supply voltage, and generating a reference voltage from the power supply voltage; a voltage divider being supplied with the output voltage from the output circuit, and dividing the output voltage with a predetermined voltage ratio; and a differential amplifier being supplied with the reference voltage and the divided voltage, and controlling the output circuit by supplying the output circuit with a voltage obtained by performing differential amplification on the reference voltage and the divided voltage according to the power supply voltage, thereby maintaining the output voltage from the output circuit at a predetermined voltage. In this circuit, since the reference voltage generator and the differential amplifier are operated with the power supply voltage, it is not necessary to supply the boosted voltage to them, whereby the output current from the booster is reduced. Therefore, undesired reduction in the boosted voltage due to an increase in the output current is suppressed. As the result, the capacitance used in the booster is reduced, and the area of the semiconductor integrated circuit is reduced.