The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 27, 2001

Filed:

Jun. 30, 1998
Applicant:
Inventors:

Nobuhiro Hase, Neyagawa, JP;

Minehiro Itagaki, Moriguchi, JP;

Yoshifumi Nakamura, Neyagawa, JP;

Satoru Yuhaku, Osaka, JP;

Hiroaki Takezawa, Katano, JP;

Yoshihiro Bessho, Higashiosaka, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/144 ;
U.S. Cl.
CPC ...
H01L 2/144 ;
Abstract

Disclosed is a method for mounting a semiconductor element, the method requiring no strict flatness for a substrate and being reliable in a semiconductor device produced by mounting a semiconductor element on a circuit substrate. In the multilayer circuit substrate comprising bump electrodes formed of a conductive paste, a conductive adhesive is applied to the top of bump electrodes and then leveled to obtain the end portions on the bump electrodes with a high coplanarity in height. The semiconductor element is mounted on this substrate using a combination of a conductive resin and a sealing resin or an anisotropic conductive sheet. Every top of the bump electrodes after the conductive adhesive is applied has a high coplanarity. The semiconductor element can be mounted with high reliability, on the substrate having such a poor flatness of the electrode face that mounting by a conventional method can not be applied.


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