The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 20, 2001

Filed:

May. 01, 1998
Applicant:
Inventors:

Jonathan Highton Stott, Horley, GB;

Justin David Mitchell, Crawley, GB;

Christopher Keith Perry Clarke, Crawley, GB;

Adrian Paul Robinson, London, GB;

Oliver Paul Haffenden, London, GB;

Philippe Sadot, Ville d'Avray, FR;

Lauret Regis, Sonchamp, FR;

Jean-Marc Guyot, Paris, FR;

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 2/706 ;
U.S. Cl.
CPC ...
H04L 2/706 ;
Abstract

A demodulator suitable for implementation in a single chip for demodulating digital video broadcast signals including data modulated on a multiplicity of spaced carrier frequencies, wherein an input broadcast signal is converted to a frequency sufficiently low to enable analog to digital conversion of the signal, converter for converting the broadcast signal to a series of digital samples in complex format, transformer for analyzing the digital sample values to provide a series of data symbol values for each carrier frequency and signal processor including channel equalizer for receiving the signal values and providing an output for decoding, automatic frequency controller for controlling the frequencies of the digital sampling signals applied to the transformer, and timing synchronizer for synchronizing the transformer with the symbol periods of the broadcast signal, including correlator for receiving the digital signal values and including a delay having a time period equal to the active symbol period, and a multiplier for receiving the digital signal values and a version thereof delayed by the delay, to form a complex product signal, and a processor for processing the complex product signal to derive timing synchronization pulses, wherein the timing synchronizer is operable in an initial hunt mode for analyzing the digital sample values over a relatively wide timing range to establish synchronization, and then operable in a zoom mode for analyzing the digital sample values over a relatively narrow range about the synchronization point.


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