The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2001
Filed:
Nov. 09, 1999
Dong Kyeun Kim, Chungcheongbuk-do, KR;
Sung Hoon Kim, Chungcheongbuk-do, KR;
Hyundai Electronics Industries Co. Ltd., Kyoungki-do, KR;
Abstract
A Column Address Strobe (CAS) latency control circuit for a SDRAM and a layout of the same allows an adequate CAS latency operation allowance at a high operation frequency. The SDRAM includes a plurality of banks each having 'n' main amplification units, 'n' bit data buses disposed between the plurality of banks each shared by respective main amplification units, ‘n’ CAS latency control circuits disposed concentrated central to the data buses one to one matched to the data buses, ‘n’ DQ blocks disposed connected to outputs of respective CAS latency control circuits in lengths different from one another, and a clock buffer for applying a clock signal to the CAS latency control circuits.