The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2001
Filed:
Apr. 27, 2000
Tetsuji Togami, Tokyo, JP;
Kazuteru Suzuki, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
In a semiconductor memory, four bit line diffused interconnections,connected to two bit line terminals D,and D,through bank selection transistors BT,and BT,are connected to drains of memory cells of four column pairs, respectively, and four bit line diffused interconnections,connected to one virtual ground line terminal VG,through bank selection transistors BT,to BT,are connected to sources of memory cells of the four column pairs. The bank selection transistors BT,to BT,are so located that each of the bit line diffused interconnections,is connected to a corresponding one of the bit line terminals D,and D,through only one bank selection transistor and each of bit line diffused interconnections,is connected to the virtual ground line terminal VG,through only one bank selection transistor. Thus, data can be surely read from a selected memory cell at a high speed. At the time of elevating the integrated density, it is easy to locate and pattern metal interconnections connected to the bit line terminal and the virtual ground line terminal.