The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2001
Filed:
Dec. 22, 1999
Mark T. Bernius, Midland, MI (US);
Edmund P. Woo, Midland, MI (US);
The Dow Chemical Company, Midland, MI (US);
Abstract
A field effect transistor is made of five parts. The first part is an insulator layer, the insulator layer being an electrical insulator such as silica, the insulator layer having a first side and a second side. The second part is a gate, the gate being an electrical conductor such as silver, the gate being positioned on the first side of the insulator layer. The third part is a semiconductor layer, the semiconductor layer including a polymer, at least ten weight percent of the monomer units of the polymer being a 9-substituted fluorene unit and/or a 9,9-substituted fluorene unit, the semiconductor layer having a first side, a second side, a first end and a second end, the second side of the semiconductor layer being on the second side of the insulator layer. The fourth part is a source, the source being an electrical conductor such as silver, the source being in electrical contact with the first end of the semiconductor layer. The fifth part is a drain, the drain being an electrical conductor such as silver, the drain being in electrical contact with the second end of the semiconductor layer. A negative voltage bias applied to the gate causes the formation of a conduction channel in the semiconductor layer from the source to the drain. On the other hand, a positive bias applied to the gate causes the formation of an electron conducting channel in the semiconductor layer.