The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 13, 2001
Filed:
Jun. 12, 1998
Yiftach Tzori, Sunnyvale, CA (US);
Simpod, Inc,, Santa Clara, CA (US);
Abstract
A digital logic simulation/emulation system (,) operates in an engaged operating mode in which a digital-logic simulation process (,) transmits stimulation-control data to a hardware pod (,) for controlling stimulation of a digital logic circuit. In response to the stimulation-control data, the hardware pod (,) performs a stimulation-response cycle, and then sends response data from the digital logic circuit to the simulation process (,). The simulation process (,) and the hardware pod (,) may also operate in a disengaged operating mode in which each operates independently of the other without exchanging stimulation-control data or response data. Operation of the system (,) in the disengaged mode commences if a disengagement event occurs in the hardware pod (,). Operation of the system (,) in the disengaged mode terminates if the simulation process (,) sends stimulation-control data to the hardware pod (,), or if the hardware pod (,) sends response data to the simulation process (,).