The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 13, 2001

Filed:

Apr. 26, 2000
Applicant:
Inventors:

Gabriel G. Suranyi, Plano, TX (US);

Vijayan J. Thottuvelil, Plano, TX (US);

Assignee:

Lucent Technologies Inc., Murray Hill, NJ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 1/00 ;
U.S. Cl.
CPC ...
H02M 1/00 ;
Abstract

A bus holdup circuit for a module of a distributed power system, a method of bolstering bus voltage and a distributed power system employing the circuit or the method. In one embodiment, wherein the module has a backplane interface adapted to be removably coupled to a DC backplane of the distributed power system, the bus holdup circuit includes: (1) an energy storage circuit, coupled across the backplane interface, adapted to store and dissipate energy to bolster a voltage across the DC backplane and (2) an inrush limiting circuit, series-coupled to the energy storage circuit, adapted to limit an inrush current to the module.


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