The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 13, 2001
Filed:
Oct. 26, 1999
Nak-won Hur, Kyungki-do, KR;
Jong-sun Kim, Kyungki-do, KR;
Abstract
A bias current for an integrated circuit is generated by generating a first bias current that increases with temperature, generating a second bias current that decreases with temperature, and summing the first bias current and the second bias current. Summing may take place by mirroring the first bias current, mirroring the second bias current and summing the mirrored first bias current and the mirrored second bias current. Pull-down circuits also are preferably provided for the circuits that generate the first and second bias currents. The pull-down circuits are responsive to a pulse signal. The pulse signal may be generated from a power-down signal or another signal. Accordingly, bias current generating circuits and methods can have reduced susceptibility to changes in temperature, changes in power supply voltage and/or process variations, and can rapidly produce the bias current.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile