The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 13, 2001

Filed:

Aug. 04, 1998
Applicant:
Inventor:

Takashi Nagasaka, Anjo, JP;

Assignee:

Denso Corporation, Kariya, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 3/300 ; H01L 2/972 ;
U.S. Cl.
CPC ...
H01L 3/300 ; H01L 2/972 ;
Abstract

A multilayer wiring substrate has a passive circuit element disposed on an insulating base substrate, and an insulating layer is disposed on the insulating base substrate with the passive circuit element interposed therebetween. The insulating layer is formed to have via holes for exposing specific portions of the passive circuit element, and a terminal electrodes are disposed in the via holes. Accordingly, the entire area of the multilayer wiring substrate can be reduced, and cracks caused by residual stress produced by a firing step can be prevented.


Find Patent Forward Citations

Nagasaka, Takashi. (2001). Multilayer wiring substrate for hybrid integrated circuit and method for manufacturing the same (U.S. Patent No. 6201286). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6201286

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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