The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 13, 2001

Filed:

Jul. 21, 1999
Applicant:
Inventors:

Kazutaka Inoue, Yamanashi, JP;

Hajime Matsuda, Yamanashi, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/1338 ;
U.S. Cl.
CPC ...
H01L 2/1338 ;
Abstract

In a compound semiconductor device constituting a field effect transistor having a buried p region,, a channel region,is formed thin and highly doped by n-type impurity, and the buried p region,is formed shallowly and highly doped by p-type impurity to compensate the highly doped channel region,. In order to prevent a leakage current between the highly doped buried p region,and a gate electrode,, a low concentration p-type impurity region,is formed on both sides of the highly doped buried p region,to thus prevent a current flow via a portion other than a channel region. Accordingly, there can be provided the compound semiconductor device including an FET which is able to suppress both the deterioration in the pinch-off characteristic and the leakage current between neighboring elements due to p-type impurity conduction other than a channel in an FET which has a high concentration and thin active layer, while suppressing the short channel effect.


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