The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 06, 2001
Filed:
Jun. 19, 1998
Applicant:
Inventors:
Sanjay Mansingh, Santa Clara, CA (US);
Stephen Clark Purcell, Mountain View, CA (US);
Assignee:
ATI International SRL, Barbados, KN;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/50 ;
U.S. Cl.
CPC ...
G06F 7/50 ;
Abstract
A double incrementing adder includes an AND gate configured to receive bits of the two input values of a common weight (“first weight”). The AND gate has an output terminal configured to carry the AND'ed bit. A three input XOR gate is configured to receive bits of the two input values of a common weight (“second weight”) one bit more significant than the first weight. The three input XOR gate is configured to XOR these values with the AND'ed bit to generate a three input XOR'ed bit.