The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 06, 2001

Filed:

Jun. 09, 1998
Applicant:
Inventors:

Yoshihiro Hori, Gifu, JP;

Hisashi Matsuyama, Ogaki, JP;

Akiomi Kunisa, Kasukabe, JP;

Nobuo Itoh, Nagoya, JP;

Seiichiro Takahashi, Gifu, JP;

Toshiaki Hioki, Ogaki, JP;

Kenji Asano, Kakamigahara, JP;

Noboru Mamiya, Gifu, JP;

Yoshiharu Uchihara, Ogaki, JP;

Kenji Nakao, Gifu, JP;

Satoshi Sumi, Gifu, JP;

Kenji Torazawa, Ogaki, JP;

Assignee:

Sanyo Electric Co., Ltd., Moriguchi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11B 5/76 ;
U.S. Cl.
CPC ...
G11B 5/76 ;
Abstract

A meandering groove is formed in a digital disk (,) with a wobble signal that is wobbled to reproduce a clock signal. The wobble signal is read out by an optical head (,). An address detection circuit (,) detects an address signal that is multiplexed with the wobble signal. A PLL oscillation circuit (,) provides a clock signal in synchronization with the wobble signal. Data is modulated by a modulation circuit (,) according to the clock signal and a timing signal based on the address signal, and recorded on the digital disk (,). In reproduction, a RF signal in the wobble signal is converted into a digital signal by an A/D converter (,). The signal is demodulated by a demodulation circuit (,) for data output.


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