The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 06, 2001
Filed:
Jan. 20, 1999
S. Daniel Cromwell, Penryn, CA (US);
Hewlett-Packard Company, Palo Alto, CA (US);
Abstract
A method and apparatus for assembling a high speed, high density VLSI module in a computer system that enables attachment, support, electromagnetic interference containment, and thermal management of the VLSI module. The present invention packages a high speed, high density VLSI module within a limited space and in a single assembly that attaches, aligns, and manages electromagnetic interference and heat dissipation of the VLSI module. The present invention aligns a land grid array of a circuit board and an interposer socket assembly, and the interposer socket assembly and a land grid array of the VLSI module; in the single VLSI module assembly. An even, controlled load is placed on the interposer socket interface thereby reducing the risk of damage to the interposer socket from overloaded connections between the land grid array of the VLSI module, the interposer socket assembly, and the land grid array of the circuit board. The present invention is easy-to-use in upgrading and handling of the VLSI module.