The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 06, 2001

Filed:

Apr. 24, 1998
Applicant:
Inventors:

Koichi Tomobe, Hitachi, JP;

Masaru Sugai, Hitachi, JP;

Hiroyuki Kida, Hitachi, JP;

Masahiro Tsuchiya, Hitachi, JP;

Yuji Matsushita, Iwaki, JP;

Hideto Suzuki, Kitaibaraki, JP;

Assignee:

Other;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 1/716 ;
U.S. Cl.
CPC ...
H03K 1/716 ;
Abstract

In a CMOS noise eliminating circuit, a plurality of PMOS transistors or NMOS transistors are connected in series so as to cause of switching speeds or switching timings of the PMOS transistors or the NMOS transistors, which are connected in series, to differ from each other, thereby improving the noise-resistant performance of a semiconductor integrated circuit.


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