The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 06, 2001
Filed:
Sep. 09, 1999
Abstract
An N times frequency multiplication circuit uses duty cycle control buffers in combination with edge detectors to provide both multiplication and 50% duty cycle adjustment. Parallel branches of duty cycle control buffers are preset for respective duty cycles of 1/N, 2/N,...,N−1/N. The buffers each receive a common edge detected input signal and simultaneously output their respective duty cycle adjusted clock signals. A rising and falling edge detector generates a pulse train at double the frequency of the 1/N buffer output, while falling edge detectors generate time spaced pulse trains from the outputs of their respective 2/N,...,N−1/N buffers. These pulse trains are combined in an OR gate to provide an output pulse train at a frequency N times the input clock frequency fin. A final stage duty cycle control buffer adjusts the N times fin output signal to a 50% duty cycle.