The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 06, 2001
Filed:
Feb. 22, 1999
Applicant:
Inventor:
Paul T. Sasaki, Sunnyvale, CA (US);
Assignee:
XILINX, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 7/38 ;
U.S. Cl.
CPC ...
G06F 7/38 ;
Abstract
A logic cell for a programmable logic device that features a random access memory adapted to selectively function as additional logic functions for the logic cell or one of a several different types of random access memory. For example, the random access memory may be configured to provide AND-OR logic functions or as a 32×1 single input port random access memory, two 16×1 single input port random access memories or a 32×1 dual input port memory.