The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 06, 2001

Filed:

Jan. 19, 2000
Applicant:
Inventors:

Yoshihiro Nagaya, Kasugai, JP;

Takashi Matsumoto, Kasugai, JP;

Assignee:

Fijitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 1/40 ;
U.S. Cl.
CPC ...
G05F 1/40 ;
Abstract

A duty ratio setting circuit includes a triangular waveform oscillation circuit for generating a triangular waveform signal and an error amplifying circuit that compares a detection voltage with a reference voltage and generates a control voltage based on the difference between the compared voltages. A comparator is connected to the oscillation circuit and the amplifying circuit and compares the voltage of the triangular waveform signal with the control voltage, and generates a first rectangular waveform signal having a predetermined duty ratio based on the comparison. A pulse signal generator generates a pulse signal having a predetermined pulse width and which is synchronized with the triangular waveform signal. A logic circuit connected to the comparator and the pulse signal generator receives the first rectangular waveform signal and the pulse signal and generates a second rectangular waveform signal. The second rectangular waveform signal has a maximum duty ratio based on the pulse width of the pulse signal when the duty ration of the first rectangular waveform signal exceeds the maximum duty ratio.


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