The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 06, 2001
Filed:
Mar. 19, 1996
Steven H. Voldman, South Burlington, VT (US);
James M. Never, Essex Junction, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A semiconductor package contains a CMOS core integrated circuit chip, a support chip, and leads for external contact. The support chip has lead-buffer circuits such as ESD protection circuits, decoupling capacitors, drivers, and receivers, for electrical connection to the core integrated circuit chip and to the leads. By removing these lead-buffer circuits from the core chip and providing them on a separate support chip, core integrated circuit chip yield and performance are improved. Typically, the support chip is elongate and has a line of circuits, one for each pad of the core chip. Since the process technology used to build the buffer circuits is decoupled from the process technology used to build the core integrated circuit chip, a high degree of ESD protection can be provided for silicon-on-insulator chips, chips using shallow trench isolation, and for chips using very small minimum dimension lines.