The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2001

Filed:

Aug. 26, 1998
Applicant:
Inventor:

Avidan Akerib, Holon, IL;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/206 ; G11C 1/504 ;
U.S. Cl.
CPC ...
G06F 1/206 ; G11C 1/504 ;
Abstract

An architecture combining an associative processor memory array and a random access memory is provided. This combination architecture enables utilizing the parallel processing abilities of the associative processor memory array while storing temporary results and parameters in the random access memory for a fully programmable, low-cost die suitable for consumer electronics applications. Parallel communication between thousands of memory words in the associative memory array and the random access memory is provided via logic hardware operative as source and destination for associative search and modify (compare and write) processing operations and also operative to read and write thousands of data elements from and to the random access memory. The tags register also serves as a communication bus for parallel communication between associative memory words.


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Akerib, Avidan. (2001). Combined associative processor and random access memory architecture (U.S. Patent No. 6195738). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6195738

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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