The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2001

Filed:

Dec. 30, 1999
Applicant:
Inventors:

Liviu Calin, Kanata, CA;

Radu Avramescu, Nepean, CA;

Assignee:

Nortel Networks Limited, Montreal, CA;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 1/500 ;
U.S. Cl.
CPC ...
G11C 1/500 ;
Abstract

Modifications to CAM cell designs are required as supply voltages utilized decrease. In one possible modified design, when a reference bit applied to the CAM cell matches a stored bit, p-channel pass transistors within the CAM cell can pass a full logical high to an n-channel chain transistor coupled within a NAND configuration with other CAM cells. This full logical high can result in increased transition speed, a decrease in degradation, and/or a decrease in power dissipation for the n-channel chain transistor. Further, compared to using n-channel pass transistors, the use of p-channel pass transistors to transfer the logical high voltage can increase the transition speed, decrease the degradation, and/or decrease the power dissipation for the pass transistors. Alternatively, the use of n-channel pass transistors and a p-channel chain transistor can gain similar advantages if the logic was opposite.


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