Two-stage pipelined recycling analog-to-digital converter (adc)

Abstract

An Analog-to-Digital Converter (ADC) contains two pipeline stages that operate in parallel on two different analog samples. Each pipeline stage includes two sub-stages. Each sub-stage has a low-resolution ADC element and a low-resolution DAC element. The ADC element converts the analog voltage input to the sub-stage into B digital bits, where B is a low number such as 1, 1.5, or 2. These digital bits are re-converted back to an analog DAC voltage by the DAC element. A subtractor then subtracts the analog DAC voltage from the sub-stage's analog input voltage to produce a difference voltage that represents the quantization error of the ADC/DAC elements. A multiplying amplifier multiplies the difference voltage by 2,to generate an output voltage to the next sub-stage. Each high-level pipeline stage acts as a recycling ADC, having a feedback switch that connects the output of the last sub-stage to the analog input of the first sub-stage. During successive clock periods, the first sub-stage converts B digital bits during a PH,phase while the last sub-stage converts another B digital bits of less significance during the PH,phase. The analog output from the last sub-stage is recycled back to the first sub-stage for the next clock and another 2B bits are converted in the next clock period. Once all of the MSB's have been converted, the last sub-stage outputs an analog residue voltage to the first sub-stage of the second pipeline stage, which then converts the LSB bits over several clock cycles using the same recycling method.