The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 27, 2001
Filed:
Jan. 27, 2000
Applicant:
Inventor:
Takashi Fujiwara, Yokohama, JP;
Assignee:
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/45 ;
U.S. Cl.
CPC ...
H03F 3/45 ;
Abstract
The present invention provides a limiter amplifier using a differential pair of MOS transistors in an input stage. A plurality of MOS transistors each having a drain and a gate connected to each other as a load transistor, are connected in series to the drains of the differential pair of MOS transistors in the input stage. MOS transistors are current-mirror-connected to the load transistors to perform feedback on the differential pair of MOS transistors in the input stage. The outputs of the differential pair of MOS transistors in the input stage are amplified by another differential pair of MOS transistors in an output stage.