Relocatable code storage in an integrated circuit with an embedded microprocessor

Abstract

A method and apparatus for providing relocatable code storage in a multifunction controller or other integrated circuit which includes an embedded microprocessor and an internal memory. The relocatable code is initially stored in an external memory which is shared by the embedded microprocessor and other system processing elements such as a host CPU. During a system initialization, power-on reset or other predetermined event, a memory multiplexing circuit connects the address inputs of the internal memory to a read/write address bus, and connects the output of a jump data storage circuit to a code data output bus. The jump data storage circuit uses code addresses received from the embedded microprocessor to generate a jump instruction code which is supplied to the embedded microprocessor via the code data output bus. The embedded microprocessor is thereby forced to jump to a designated location in external memory which may include a transfer instruction directing the embedded microprocessor to transfer relocatable code from the external memory to the internal memory. The memory multiplexing circuit then configures the internal memory into an execution mode, in which the address inputs of the internal memory are connected to a code address bus and the data outputs of the internal memory are connected to the code data output bus. This ensures that the embedded microprocessor will have access to valid internal code after a system initialization or other predetermined event.