The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2001

Filed:

Sep. 15, 1999
Applicant:
Inventors:

Helmut Heinz, Ansbach, DE;

Bernhard Schuch, Neusitz, DE;

Assignee:

DaimlerChrysler AG, Stuttgart, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/144 ; H01L 2/148 ; H01L 2/150 ;
U.S. Cl.
CPC ...
H01L 2/144 ; H01L 2/148 ; H01L 2/150 ;
Abstract

An electronic component is mounted on a substrate such as a circuit board by means of a soldering process such as reflow soldering. The circuit board has a thermal via hole therethrough to provide a heat dissipation path from the top surface to the bottom surface of the circuit board, for dissipating heat from the electronic component. To prevent molten solder from penetrating through the via hole during the soldering process, the via hole is sealed prior to the soldering process. The via hole is sealed from the bottom surface of the substrate by carrying out a screen printing process including at least two printing passes to print a sealing material into the open hole of the thermal via.


Find Patent Forward Citations

Quick Actions:

Heinz, Helmut. (2001). Method of fabricating a circuit arrangement with thermal vias (U.S. Patent No. 6190941). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6190941

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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