Microcontroller having a block of logic configurable to perform a selected logic function and to produce output signals coupled to corresponding i/o pads according to a predefined hardware interface

Abstract

A microcontroller is presented having a block of logic configurable to perform a selected logic function and to produce output signals coupled to corresponding I/O pads according to a predefined hardware interface. The microcontroller includes a central processing unit (CPU), a first set of I/O pads, and a configurable logic block (CLB) all formed upon a single monolithic semiconductor substrate. The CPU is configured to execute instructions, preferably x86 instructions. The CPU produces CPU output signals during instruction execution. The CLB is coupled between the CPU output signals and the first set of I/O pads, and is configurable to perform a logic function selected from a predefined set of logic functions. Each member of the set of logic functions has an associated hardware interface including a signal table which defines a correspondence between CLB input/output signals and members of the first set of I/O pads. The microcontroller also preferably includes a test/program core coupled to a second set of I/O pads and to the CLB. The test/program core produces programming signals in response to signals received via the second set of I/O pads. The programming signals cause the CLB to perform the selected logic function. When programmed, the CLB produces CLB output signals in response to the CPU output signals. Each of the CLB output signals is coupled to one or more of the members of the first set of I/O pads according to the hardware interface of the selected logic function.