The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 06, 2001
Filed:
Aug. 29, 1997
Steven Frederick Gillig, Roselle, IL (US);
Jeannie Han Kosiec, Schaumburg, IL (US);
Motorola Inc., Schaumburg, IL (US);
Abstract
An apparatus and method enables elements of a phase locked loop (PLL) (,). The PLL,includes a plurality of elements (,). Each element produces an output signal (,or,). Each element has a response time (t,−t,) defined by the difference in time between a first time (t,) at which the element is enabled and a second time (t,), occurring after the first time (t,), at which the output signal of the element reaches a steady state condition. A voltage controlled oscillator (,) of the plurality of elements, having a first response time (t,−t,) is enabled at the first time (t,) responsive to a first control signal (,). A loop divider (,) of the plurality of elements, having a second response time less than the first response time (t,−t,), is enabled responsive to the first response time (t,−t,) and a second control signal (,). The present invention advantageously provides fast lock time for the PLL (,).