The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 2001

Filed:

Dec. 23, 1998
Applicant:
Inventor:

Cheng P. Wen, Mission Viejo, CA (US);

Assignee:

Raytheon Company, Lexington, MA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 7/02 ;
U.S. Cl.
CPC ...
H05K 7/02 ;
Abstract

Structures and methods that provide for the vertical alignment of and electrical interconnection of MEMS tiles using metallized elastic spheres and precision pyramid shaped pits etched on the surface of silicon substrates. The methods of producing large area, multi-tile (substrate) structures permit fabrication of phased array antenna transmit/receive subsystems, for example, requiring precision, vertical electrical (DC and RF) interconnects between tiles and frames stacked on top of one another. Metallized, back-to-back, inverted pyramid shaped, vertical via structures are fabricated on high resistivity silicon tiles using micro-electronics mechanical system (MEMS) techniques. Slightly oversize, metallized, elastic spheres are squeezed between two inverted pyramid-shaped indentations to provide electrical conduction and accurate alignment between the substrates.


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