The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 06, 2001
Filed:
Dec. 14, 1998
Saed G. Younis, San Diego, CA (US);
Daniel Keyes Butterfield, San Diego, CA (US);
Qualcomm Incorporated, San Diego, CA (US);
Abstract
An inventive high-resolution Delta-Sigma analog-to-digital converter using a Continuous-Time implementation having suppressed sensitivity to clock jitter. The inventive method and apparatus suppresses the sensitivity to jitter by the square of the oversampling ratio when compared to current Continuous-Time implementations of Delta-Sigma modulators. The present invention eliminates the clock jitter disadvantage between sampled-data and Continuous-Time implementations of Delta-Sigma modulators. The present invention preferably includes a digital-to-analog converter that ensures that the integral of an output voltage is constant over a clock duty cycle regardless of clock jitter. The digital-to-analog converter preferably includes at least two switches and a capacitor. A first switch is used to charge the capacitor and a second switch is used to discharge the capacitor. Each switch is controlled by a clock phase wherein the sum of the two phases equals the clock duty cycle.