The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 06, 2001
Filed:
Jan. 27, 2000
Yoshiro Goto, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
Producing method for a semiconductor device in which, for producing CMOS transistors of plural sorts, for example, dual power source transistors, having an added ROM unction, the number of times of ion implantation and resist pattern formation can be reduced to reduce the number of producing process steps. In producing a semiconductor device comprised of five sorts of MOS transistors, namely thin-film CMOS transistors (area A of FIG.,), thick-film CMOS transistors (area B of FIG.,) and an ROM code transistor (area C of FIG.,), ion implantation for forming an inversion layer (,of FIG.,) on a channel surface of the ROM code transistor and the ion implantation for adjusting threshold value voltage of P channel of the CMOS transistor are carried out in the same process step (process (d) of FIG.,). Also, the ion implantation for adjusting threshold value voltage of N channel of the thin-film CMOS transistor is effected using a resist pattern (,of FIG.,(,)) for the formation of a gate oxide film of the thin-film C MOS transistor (step (g) of FIG.,).