The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 30, 2001
Filed:
Aug. 14, 1998
Ramesh V. Peri, Allentown, PA (US);
Sanjay Jinturkar, Bethlehem, PA (US);
Lincoln Fajardo, Kempton, PA (US);
Jay Wilshire, Pennsburg, PA (US);
Lucent Technologies, Inc., Murray Hill, NJ (US);
Abstract
A system for debugging the computer program present in read-only memory (ROM) contains a debugger, a processor, read-only memory, a bus and a hardware debugging support module. The hardware debugging support module contains a first register called the range start register, a second register called the range end register and a comparator. The debugger uses a list of “n” user specified break points to divide a computer program into “n+1” regions, each of which has a start address and an end address. The first register and the second register of the hardware debugging support module are programmed with the start address and end address of a region which contains a specific address. The comparator is connected to the first register and second register of the hardware debugging support module and is also connected to the bus which connects the read-only memory to the processor. The comparator monitors addresses traveling on the bus and causes the hardware debugging support module to interrupt the processor and transfer control of the computer program to the debugger if a specific address traveling on the bus does not fall within the range defined by the first register and the second register. The debugger then searches the remaining “n+1” regions to see if the specific address lies within a second region. If such a region is found, then the start address and end address of that second region are entered into the first register and the second register and the computer program is run. However, if such a region is not found, then the computer program has reached a break point and the debugger transfers control of the program to the user. The computer program can then be single stepped to execute the instruction at which the break point was placed to obtain an output address. The start address and end address of the region that contain this output address are programmed into the first register and the second register and the computer program is run. This process is repeated until the entire computer program has been executed.