The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 30, 2001

Filed:

Nov. 23, 1998
Applicant:
Inventor:

David H. Stokes, Nevada City, CA (US);

Assignee:

ADC Telecommunications, Inc., Minneapolis, MN (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/300 ;
U.S. Cl.
CPC ...
G06F 1/300 ;
Abstract

A port switch includes n bidirectional communication ports and a router having n inputs connected to the n ports respectively and n outputs connected to the n ports respectively and including a staging RAM and a switch responsive to data in the staging RAM for connecting the ith router input to the jth router output and for connecting the kth router input to the lth router input. A source lookup table contains, for each port, an entry specifying the router input that is connected to that port and a destination lookup table contains, for each port, an entry specifying the router output that is connected to that port. Forward and reverse connections are established between a uth port (1<&equals;u<&equals;n) and a vth port (1<&equals;v<&equals;n) by addressing the source lookup table with addresses associated with the uth and vth ports and reading respective router inputs and addressing the destination lookup table with addresses associated with the uth and vth ports and reading respective router outputs. A matrix image data structure is created containing entries specifying at least the router inputs for the uth and vth ports and the router outputs for the uth and vth ports. The router input and router output entries in the matrix image data structure are utilized to refresh the staging RAM of the router.


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