The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 30, 2001
Filed:
Mar. 18, 1999
Applicant:
Inventors:
Dan Stotz, Ft. Collins, CO (US);
Richard A. Krzyzkowski, Ft. Collins, CO (US);
Paul D. Nuber, Ft. Collins, CO (US);
Assignee:
Agilent Technologies, Palo Alto, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/00 ;
U.S. Cl.
CPC ...
H03K 5/00 ;
Abstract
A high gain, low input capacitance clock buffer includes a plurality of transistors configured to supply an inverted representation of an input reference signal by alternatively switching to provide the output. While either of the transistors is operating to switch the input clock signal, the other transistor is in a stable state. Furthermore, by using n-type FET's, significant power reduction and space savings may be achieved.