The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 30, 2001

Filed:

Nov. 20, 1998
Applicant:
Inventors:

Jun Ki Kim, Seoul, KR;

Jin Won Park, Chungcheongbuk-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/176 ; H01L 2/1311 ;
U.S. Cl.
CPC ...
H01L 2/176 ; H01L 2/1311 ;
Abstract

A separating region and a method of forming a separating region of a semiconductor device is provided that increases reliability of the device by isolating respective gate electrodes. The separating region and method prevent voids from being formed within a trench of the separating region. The method of forming the separating region includes forming patterns of first insulating layers on a semiconductor substrate by selectively etching the first insulating layers to have at least one opening disposed in a defined region of the semiconductor substrate, forming side walls of a second insulating layer on both lateral sides of the patterns of the first insulating layers, and etching the side walls of the second insulating layer and the exposed semiconductor substrate using the patterns of the first insulating layers as a mask to form trenches in the semiconductor substrate. Since a selectively ratio of the sidewalls and the semiconductor substrate is preferably 1:1, the trenches have a prescribed shape and depth. The trenches become narrower top to bottom. A third insulating layer is formed on the surface of the patterns of the first insulating layers including inside the trenches. The third insulating layer is selectively etched to expose the upper part of the patterns of the first insulating layers and form the device separating layer.


Find Patent Forward Citations

Kim, Jun. (2001). Method of forming separating region of semiconductor device (U.S. Patent No. 6180488). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6180488

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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