The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 30, 2001

Filed:

Mar. 05, 1999
Applicant:
Inventors:

Govindarajan Natarajan, Pleasant Valley, NY (US);

John U. Knickerbocker, Hopewell Junction, NY (US);

Suresh D. Kadakia, Poughkeepsie, NY (US);

Abubaker S. Shagan, Poughkeepsie, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B32B 3/120 ; B32B 3/500 ;
U.S. Cl.
CPC ...
B32B 3/120 ; B32B 3/500 ;
Abstract

The present invention relates generally to a new apparatus and method for forming non-planar surfaces in substrates. More particularly, the invention encompasses an apparatus and a method for fabricating non-planar surfaces in semiconductor substrates wherein at least one zero compression set pad, such as a closed cell porous pad in combination with at least one elastic pad is placed over the non-planar surface prior to lamination and is caused to conform to the contour of the non-planar surface, thus preventing collapse of, or damage to, the non-planar features, such as, shelves or corners during the lamination process. After the lamination process, the zero compression set pad are conveniently removed from the non-planar surface area without causing any damage to the non-planar surface features, such as, shelves or corners or having any paste pull-outs. These zero compression set pads can be reused multiple number of times to form these MLC cavity substrates or similar other structures or features.


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