The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 23, 2001

Filed:

Nov. 03, 1998
Applicant:
Inventor:

Yoshiyuki Ota, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 1/10 ;
U.S. Cl.
CPC ...
G05F 1/10 ;
Abstract

There is provided a current mirror circuit which suppresses variations in an output current resulting from the Early effect. A pair of transistors (T,, T,) of a conventional current mirror circuit have gates connected to each other, and sources connected to each other, with the gate and drain of one of the transistors short-circuited. The source and drain of the other transistor (T,) on an output current side are connected to the source and gate of a transistor (T,), respectively. The sources of all of the transistors (T,, T,, T,) are commonly connected to a constant current circuit comprised of a bias voltage generating circuit (VB,) and a transistor (T,). A bias point is determined so that the increase/decrease in a current (Iout) causes the increase/decrease in a current (Icom), and the sizes of the respective transistors are designed.


Find Patent Forward Citations

Ota, Yoshiyuki. (2001). Current mirror circuit and charge pump circuit (U.S. Patent No. 6177827). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6177827

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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