The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 23, 2001
Filed:
Feb. 09, 1999
Fumiaki Nagao, Ibi-gun, JP;
Yuji Sakai, Anpachi-gun, JP;
Sanyo Electric Co., Ltd., Osaka, JP;
Abstract
An output of a flip flop (,) at a first stage is connected to a D-input of a flip flop (,) at a second stage, and an inverted-output of the flip flop (,) is connected to a D-input of a flip flop (,) at a third stage. A reference clock BCK is supplied to the D-input of the flip flop (,), and an oscillation clock OCK is inputted to each T-input of the respective flip flops (,) to (,). An XOR of the reference clock BCK and an output signal Q,of the flip flop (,), and a logical product of an output signal Q,of the flip flop (,) and an output signal Q,of the flip flop (,) are used as a first comparison output PDU and a second comparison output PDD, respectively. With this arrangement, phase comparison can be achieved using a clock of any duty ratio.