The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 23, 2001
Filed:
Jun. 02, 1999
Jente B. Kuang, Lakeville, MN (US);
John P. Pennings, Walden, NY (US);
George E. Smith, III, Wappingers Falls, NY (US);
Michael H. Wood, Hopewell Junction, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A self-aligned SOI FET device with an “L” shaped gate structure allows an integral diode junction to be formed between the source and the body of the device. Two devices with this gate geometry can be advantageously placed side-by-side in a single rx opening that could accommodate but a single device with a “T” shaped gate structure. The devices in accordance with the teachings of this invention can be easily formed using standard prior art SOI processing steps. An aspect of this invention includes the use of these novel SOI devices with their body and source connected together in circuit applications, such as memory cell sense amplifiers, where high speed operation commends the use of SOI technology, but physical space considerations have limited their application.